The original schematic is correct, just following it should be okay.
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The pull-up resistors on the IIC bus are to reduce the power consumption, to keep the IIC bus state in the default sleep mode when being powered up
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Q1 is used to be as the reset circuit, and to isollate the 5V-3V system
AStrobe and DTAck must be taken to generate the upper address gating signal
As for D8-D15, they were not be used by the mapper, neither registers nor the save RAM