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bsnes v0.0.004
RBM-13s, 02:34, 28-12-2004
Обновился молодой эмулятор SNES:
- 12/25/2004
- Merry Christmas. I put up a new version of bsnes, even though the spc700 is nowhere near done like I wanted, since it's Christmas (or the winter solstice, if you prefer). This has all the fixes I've posted here since v003-wip1, as well as an improved debugging interface, and some NMI fixes.

- Merry Christmas. I put up a new version of bsnes, even though the spc700 is nowhere near done like I wanted, since it's Christmas (or the winter solstice, if you prefer). This has all the fixes I've posted here since v003-wip1, as well as an improved debugging interface, and some NMI fixes.
- 12/24/2004
- Improved the timing some more. After spending all day running tests on the SNES using the dot clock as a reference, I've determined that it in fact does act just like the NES. When the screen is not interlaced, there are 262 scanlines/frame. On even frames, scanline 241 is 4 cycles short. All other scanlines, including all scanlines on odd frames, are 1364 cycles long. In interlace mode, all scanlines are 1364 cycles long. Even frames have 263 scanlines, and odd frames have 262 scanlines. So either the SNES CPU + dot clock are being suspended each scanline/frame to sync with NTSC timing, or the SNES runs at a non-standard refresh rate that changes based on the interlace setting. I haven't tested changing the interlace mid-frame yet. For now, I emulate this by making changes to $2133 bit 0 (interlace enable) take effect on the next frame. I also corrected the DRAM refresh to occur at dot position 0x87 or greater. And lastly on the timing front, I made HDMA not require 18 master cycles to initialize if no channels are active.
- I also decided that it would be ok to add some x86 assembly to the Windows-specific code, since the windows port would only run on x86 platforms anyway. Given 95% of rendering is done in the PPU core, I was only really able to speed up the PPU screen->DirectDraw screen blitting. It doesn't seem to help much, unfortunately... I need to figure out how to profile code so I can find the bottlenecks in the emulation.
- 12/21/2004
- Lots of stuff today. First, I was using Charles MacDonald's SNES document for my NMI timing. He stated that NMI was triggered on scanline $e8/$f7. This is wrong, it is triggered on $e1/$f0. Maybe his timing was for PAL, or something? This fixed the SNES Test Program from flickering, Zelda 3's triforce timing, and Super Valis IV's background in Stage 2 from flickering. I also moved the NMI trigger to dot 3 on the scanline, which gets me much closer to real SNES timing.
- I also improved sprites. I added support for $2133 bit 1, which lets you halve the height of sprites (actually, it interlaces them, but it looks like they're halved). This gets the SNES Test Program sprite test to look a little better. I also added proper ordering of sprites. I was just drawing sprite #127 to 0. Now, I also allow sprites with lower numbers and lower priorities to appear on top of sprites with higher numbers and higher priorities. This fixes the sprite overlapping problem in Bahamut Lagoon, and other games.
- Lastly, I finished all of the remaining spc700 opcodes. So 100% of the spc700 cpu core is finished now. Some of the opcodes I don't know how to do are just empty functions (tcall, pcall, ret1, etc.), some are missing some of their flags, and some probably parse their opcode arguments wrong. I need to write the spc700 disassembler portion to output the opcodes to the console window, and add better console window output control and then I should be able to compare against other spc700 cores to fix the bugs in mine. After that, I need to add the DSP registers and spc700 clock timing, then get that to synchronize with the 65816, then add the cpu<->apu bridge, and finally: compatibility should increase a good deal.
- 12/20/2004
- Fixed a small bug with windows/color windows in BG modes 5 and 6. The window positions need to be doubled to work across the entire screen. Madara 2's name entry screen looks better now. Surprising, since the color math is the same as modes0-4/7. From what I've read, modes5/6 have more complex color math.
- I spent most of my time though adding in a ton of new opcodes to the spc700 core. I now have 215 of 256 opcodes finished. I don't have the v/h/c flags implemented for adc/sbc yet, though. I don't even know what a half carry is, and I'm fairly certain it's not just a mirror of n.
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