The digital audio output amplitude of the FPGA is 0-3.3V, but in most cases, in order to achieve good resolution, it is always below 3.3/2. The APU outputs a DC voltage of around 5/2V. When there is only a small impedance between the two, the output of the APU is pulled down by the FPGA, which may result in a large current, and both interfere with each other, leading to deterioration in sound quality. Specifically, 3.3/2 continuously pulls down the 5/2 level, which also lowers the static operating point of the audio amplifier transistor in the subsequent stage.
What if we increase the resistance between the two? Replacing the 2.2ohm resistor with a larger one? For example, using a Mohm or Kohm level resistor would greatly reduce the interference with the APU output, but it could not solve the problem of the subsequent static operating point being pulled down. At this point, the FPGA still dominates the APU output, and the static operating point is similarly lowered, leading to weakened output from the audio amplifier transistor.
By programming the software, we can increase the FPGA digital output, raising the equivalent output volume of the expansion audio from the FPGA, which can significantly reduce interference with the APU output (this is similar to the approach where the software OS upgrade only retains the hi status option); however, this only improves the situation and does not completely resolve the issue.
Using an operational amplifier for matching of the FPGA digital audio output resolves the problem.
What if we do not use an operational amplifier? The simplest circuit approach would be to simply add an electrolytic capacitor to isolate the lower output level of the FPGA.
If you are very resistant to destructive modifications to hardware, then the following parameter changes may be suitable for you. Change the values of two resistors to isolate each other. However, these two values have certain computational considerations; their balanced voltage center should be closer to 5/2, so as not to cause additional effect on the original famicom/clone. The series resistance for the FPGA audio output should be larger, with a ratio of about 1:2 being appropriate, and values in the range of >470 Ohm, <10K Ohm should be acceptable.
