proj_1 (based)
Synthesis -
Compiler Report
Compiler Constraint Applicator
Pre-mapping Report
Clock Summary
Mapper Report
Clock Conversion
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: PLL|CLKOP_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: RP2C02_LITE_LAT_V3|MCLK
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Resource Utilization
Place and Route -
Xilinx Timing Report (19:00 16-Apr)
Session Log (21:36 16-Apr)