@N: MF248 |Running in 64-bit mode.
@N: MF666 |Clock conversion enabled 
@N: MT206 |Auto Constrain mode is enabled
@N: BN362 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":814:0:814:5|Removing sequential instance RC in hierarchy view:work.TIMING_GENERATOR(verilog) because there are no references to its outputs 
@N: FX271 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":814:0:814:5|Instance "MOD_TIMING_GENERATOR.V[0]" with 16 loads replicated 1 times to improve timing 
@N: FX271 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":814:0:814:5|Instance "MOD_TIMING_GENERATOR.V[1]" with 13 loads replicated 1 times to improve timing 
@N: FX271 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":814:0:814:5|Instance "MOD_TIMING_GENERATOR.V[2]" with 13 loads replicated 1 times to improve timing 
@N: FX271 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":814:0:814:5|Instance "MOD_TIMING_GENERATOR.V[3]" with 13 loads replicated 1 times to improve timing 
@N: FX271 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":814:0:814:5|Instance "MOD_TIMING_GENERATOR.V[4]" with 10 loads replicated 1 times to improve timing 
@N: FX271 :"d:\ppu_reverse\fpga\ppu_lite_lattice_v3\rp2c02_lite_lat_v3.v":1430:0:1430:5|Instance "MOD_OBJ_FIFO.SH3" with 4 loads replicated 1 times to improve timing 
@N: FX271 :|Instance "G_33" with 2 loads replicated 1 times to improve timing 
@N: FX164 |The option to pack registers in the IOB has not been specified. Please set syn_useioff attribute.  
@N: BW106 |Synplicity Constraint File capacitance units using default value of 1pF 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
