@W: CL159 :"D:\PPU_REVERSE\FPGA\PPU_LITE_LATTICE_V3\RP2C02_LITE_LAT_V3.v":47:6:47:11|Input VRAMCS is unused
@W: CL159 :"D:\PPU_REVERSE\FPGA\PPU_LITE_LATTICE_V3\RP2C02_LITE_LAT_V3.v":48:6:48:12|Input VRAMA10 is unused
@W: CL159 :"D:\PPU_REVERSE\FPGA\PPU_LITE_LATTICE_V3\RP2C02_LITE_LAT_V3.v":1591:6:1591:10|Input nPCLK is unused

